diff options
| author | Andres Rey <[email protected]> | 2018-11-29 18:44:47 +0000 |
|---|---|---|
| committer | Andres Rey <[email protected]> | 2018-11-29 18:44:47 +0000 |
| commit | c7aafe56809c75969c8c96aeb2b28169d4b5cddc (patch) | |
| tree | cfce9449db86e92fd73e00fd1848ffb0f2d5f457 /test/test-pages/blogger | |
| parent | 31059dd083d840a5054f726a2b6df03826fcf718 (diff) | |
Update test expectations
Diffstat (limited to 'test/test-pages/blogger')
| -rw-r--r-- | test/test-pages/blogger/expected-metadata.json | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/test/test-pages/blogger/expected-metadata.json b/test/test-pages/blogger/expected-metadata.json index 1de8a0c..43a34d6 100644 --- a/test/test-pages/blogger/expected-metadata.json +++ b/test/test-pages/blogger/expected-metadata.json @@ -1,7 +1,7 @@ { - "Title": "Open Verilog flow for Silego GreenPak4 programmable logic devices", "Author": null, + "Direction": null, "Excerpt": "I've written a couple of posts in the past few months but they were all for the blog at work so I figured I'm long overdue for one on Silic...", "Image": "https:\/\/1.bp.blogspot.com\/-YIPC5jkXkDE\/Vy7YPSqFKWI\/AAAAAAAAAxI\/a7D6Ji2GxoUvcrwUkI4RLZcr2LFQEJCTACLcB\/w1200-h630-p-nu\/block-diagram.png", - "Direction": null + "Title": "Open Verilog flow for Silego GreenPak4 programmable logic devices" }
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