diff options
| author | Andres Rey <[email protected]> | 2018-11-26 22:40:10 +0000 |
|---|---|---|
| committer | Andres Rey <[email protected]> | 2018-11-26 22:40:10 +0000 |
| commit | 2fa332ff8d44dec300904538bfa3a196e051dcfd (patch) | |
| tree | 30cf3f5560ac14dd6e30ebb8e2f8fbcd704b1acf /test/test-pages/blogger | |
| parent | 4dfbc5db03d429741454b076f35c2513a1a525ab (diff) | |
Add all missing metadata bits
Diffstat (limited to 'test/test-pages/blogger')
| -rw-r--r-- | test/test-pages/blogger/expected-metadata.json | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/test/test-pages/blogger/expected-metadata.json b/test/test-pages/blogger/expected-metadata.json index eef4912..1de8a0c 100644 --- a/test/test-pages/blogger/expected-metadata.json +++ b/test/test-pages/blogger/expected-metadata.json @@ -2,5 +2,6 @@ "Title": "Open Verilog flow for Silego GreenPak4 programmable logic devices", "Author": null, "Excerpt": "I've written a couple of posts in the past few months but they were all for the blog at work so I figured I'm long overdue for one on Silic...", - "Image": "https:\/\/1.bp.blogspot.com\/-YIPC5jkXkDE\/Vy7YPSqFKWI\/AAAAAAAAAxI\/a7D6Ji2GxoUvcrwUkI4RLZcr2LFQEJCTACLcB\/w1200-h630-p-nu\/block-diagram.png" + "Image": "https:\/\/1.bp.blogspot.com\/-YIPC5jkXkDE\/Vy7YPSqFKWI\/AAAAAAAAAxI\/a7D6Ji2GxoUvcrwUkI4RLZcr2LFQEJCTACLcB\/w1200-h630-p-nu\/block-diagram.png", + "Direction": null }
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